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NAMEverga - VERrilog simulator for tkGAteSYNOPSISverga [-eslqi] [-d dtype] [-S script] [-P mods] [-t mod] [-B dir] [-D hash] [-W wmode] [files...]DESCRIPTIONVerga is a verilog simulator designed to be used with tkgate, but it can also be used as a stand-alone simulator.Verga documentation can be found at: https://bitbucket.org/starling13/tkgate OPTIONSThe options are as follows:
HISTORY & CREDITSTkGate begin life as an undergraduate project at Carnegie Mellon University (CMU) in 1987. At that time it was called simply 'gate' and ran under the 'wm' window manager, a windowing system developed at CMU before X11 was widely used. In this incarnation it was used by students in the computer architecture course at CMU to develop a simple microprocessor (dubbed "The Bat Computer"). After laying dormant for several years, it was resurrected in 1991 and ported to run under X11 with the Xlib API. In this incarnation it was used several times by students in the introductory digital logic course, but after the author graduated and left CMU, it went into hibernation again. This Tcl/Tk incarnation was begun in 1998. While there is certainly some cruftyness in the implementation in places due to the multiple reincarnations, many new features have been added since the older wm and X11 versions, and the interface has been made much easier to use.SEE ALSOgmac(1), tkgate(1)AUTHORJeffery Hansen (hansen@tkgate.org)Andrey V. Skvortsov (starling13@gmail.com) COPYRIGHTCopyright (c) 1987-2015 by Jeffery HansenCopyright (C) 2015-2018 by Andrey V. Skvortsov Visit the GSP FreeBSD Man Page Interface. |